受新加坡某大型半导体公司委托，招聘赴新加坡IC Design-(Advance Node PDK, DE)Engineer/Snr /Principal Engineer
工作地点：新加坡
Responsibility
1.To review and interpret process design rules and spice model documents, in order to create specification data (min./max. parameter values, netlist parameters, etc.) for the Process Design Kit development.
2.Create and maintain test cases for Process Design Kits / DRC / LVS or PEX and perform quality assurance checks to ensure error free deliveries to customers.
3.The person must have one or more of the following skill :
a.Run simulations, Layout vs Schematic (LVS) check, Design Rule Check (DRC), Parasitic Extraction (PEX), and Back-annotation (post-layout simulation) to ensure proper integration of the process design kit components.
b.Develop PEX runset to support the major PEX tools used by customer and to validate the runset integration with device libraries, SPICE model, and back annotation
c.Validate LVS / DRC  runset integration with device library and parasitic extraction runset+spice models for postlayout simulation to ensure proper integration of process design kit components
4.Create and update release notes and application notes, and to document any known limitations, issues, and solutions, in order to communicate relevant information on proper usage of the Process Design Kit components to customers.
 
Requirement
Bachelor in Electrical/Electronics Engineering with 2 yrs relevant experience. Preferred Major is IC Design.
Computer programming skills (Tcl/tk, Perl,Shell) in a Unix/Linux environment.
General knowledge of semiconductor device and processes.
Well-versed with industry standard design/layout tools and design kits.
Experience in Physical Verification technology file development is an added advantage
Experience in 45nm and below is an added advantage.

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